1. Field of the Invention
The present invention relates to a method of heat treating a silicon wafer prepared by a Czochralski method (hereinafter, referred to as xe2x80x9ca CZ methodxe2x80x9d) to be used for manufacturing a semiconductor integrated circuit, a wafer to be used in such a method, and a heat-treated wafer obtained by such a heat treatment method.
2. Description of the Related Art
Recently, causes of deterioration of yields in processes for manufacturing semiconductor integrated circuits include existence of: micro defects of oxygen precipitations which lead to nuclei of oxidation induced stacking faults (hereinafter referred to as xe2x80x9cOSF""sxe2x80x9d); crystal-originated particles (hereinafter referred to as xe2x80x9cCOP""sxe2x80x9d); and an interstitial-type large dislocation (hereinafter referred to as xe2x80x9cL/Dxe2x80x9d). Micro defects as nuclei of OSF""s are introduced into a silicon ingot during crystal growth, and actualize such as in an oxidation process on manufacturing semiconductor devices, leading to malfunctions such as increase of leakage current of fabricated devices. Meantime, cleaning mirror-polished silicon wafers by a mixed solution of ammonia and hydrogen peroxide leads to formation of pits on the wafer surface, and such pits are detected as particles similarly to real or intrinsic particles. Such pits are referred to as COP""s, to distinguish them from real particles. COP""s which are pits on a wafer surface cause deterioration of electric characteristics such as a time dependent dielectric breakdown (TDDB) characteristic and a time zero dielectric breakdown (TZDB) characteristic. Further, existence of COP""s in a wafer surface causes physical steps during a wiring process of devices, and these steps cause wire breakage. In addition, it causes troubles such as leakage on a device separating portion, so that the yield of products is reduced.
On the other hand, an L/D is called a dislocation cluster, or a dislocation pit since a pit is formed when a silicon wafer having this defect is immersed in a selective etching solution containing hydrofluoric acid as a main ingredient. Such an L/D also causes deterioration of electric characteristics such as a leak characteristic and an isolation characteristic.
From the above, it is required to reduce OSF""s, COP""s and L/Ds from a silicon wafer to be used for manufacturing a semiconductor integrated circuit.
As a method for reducing such OSF""s and L/Ds, there has been conventionally disclosed a defect-free silicon wafer free of OSF""s, COP""s and L/Ds in Japanese Patent Application Laid-Open Nos. HEI 8-330316 (1996) and HEI-11-1393 (1999).
In the method disclosed in Japanese Patent Application Laid-Open No. HEI 8-330316 (1996), a silicon monocrystal is grown at a lower speed so that OSF""s being formed like a ring is disappeared from a center of the wafer and L/Ds are removed from the whole surface of the wafer, while OSF to be caused like a ring at the time of heat-treating the silicon monocrystal as a silicon wafer.
However, the range of speed for pulling a silicon monocrystal and the range of temperature gradation in the crystal in the axial direction for making a non-defective silicon monocrystal by the method disclosed in the above reference are confined in comparatively narrow limits, respectively. Manufacturing the non-defective silicon monocrystal will become more difficult with increasing diameter of a silicon monocrystal being pulled. In some cases, OSF""s may be occurred as a mass on the central part of the wafer but not as a ring by the variations in the pulling speed or the like. The OSF""s lead to deterioration of the leak characteristic as described above, so that the improvements on the process of manufacturing a silicon monocrystal have been demanded.
The method disclosed in Japanese Patent Application Laid-Open No. HEI-11-1393 (1999) including the step of pulling a single silicon crystal ingot comprising a perfect domain [P] from a silicon melt, where the perfect domain [P] is supposed to be free of agglomerates of vacancy point defects and free of agglomerates of interstitial silicon point defects within the ingot. The silicon wafer sliced out from the ingot consists of the perfect domain region [P]. The perfect domain [P] exists between an interstitial silicon point defect dominant domain [I] and a vacancy point defect dominant domain [V] within the single silicon crystal ingot. The silicon wafer comprising the perfect domain [P] is formed by determining a value of V/G (mm2/minute xc2x0C.) such that OSF""s generated in a ring shape during a thermal oxidization treatment disappears at the center of the wafer, in which V (mm/minute) is a pulling-up speed of the ingot, and G (xc2x0C./minute) is a vertical temperature gradient of the ingot near the interface between a silicon melt and the ingot.
On the other hand, some semiconductor device manufacturers may demand silicon wafers which are free of OSF""s, COP""s and L/Ds but have abilities for gettering metal contamination caused in the device process. Metal contamination of wafers having insufficient gettering abilities in the device process leads to junction leakage, and to occurrence of malfunctions of devices due to a trap level of metal impurities. To solve this problem, there has been demanded a silicon wafer that exerts the effect of intrinsic gettering (IG) by a heat treatment during the device process of the device maker.
The silicon wafer sliced out from the ingot comprising the perfect domain [P] described above is free of OSF""s, COP""s and L/Ds. However, oxygen precipitation is not necessarily caused within the wafer by the heat treatment in a device manufacturing process, leading to the disadvantage of causing an insufficient IG effect.
Conventionally, the step of treating a silicon wafer for making full use of the capabilities of. IG effect of the silicon wafer during the device process may be of making defections in the wafer in advance or adding impurities intentionally in advance. In the silicon wafer treated by such a step, contaminants generated by the subsequent steps are absorbed around the preformed defections of the wafer. Therefore, we can prevent the generation of any defection or contamination on an area in proximity to the wafer""s surface on which a device is to be formed.
On the other hand, there is a tendency to decrease a heat treatment temperature to a temperature of 1,000xc2x0 C. or less in the device process because of increasing the packing density of device in recent years. Therefore, it is strongly desirable to perform the IG treatment at a low temperature as a pretreatment in the device process.
Further, there has been proposed a heat treatment method for exhibiting an IG effect (Japanese Patent Application Laid-Open No. HEI-8-45945 (1996)), comprising the steps of: holding a silicon wafer just ground and polished after sliced out from a single silicon crystal ingot at 500 to 800xc2x0 C. for 0.5 to 20 hours, to thereby introduce oxygen precipitation nuclei into the wafer; rapidly heating the silicon wafer including the oxygen precipitation nuclei from a room temperature to temperatures of 800-1,000xc2x0 C. and holding the wafer for 0.5 to 20 minutes; leaving the silicon wafer rapidly heated and held for 0.5 to 20 minutes, down to a room temperature; and heating the thus cooled silicon wafer from temperatures of 500 to 700xc2x0 C. up to temperatures of 800 to 1,100xc2x0 C. at a rate of 2 to 10xc2x0 C./minute, and holding the silicon wafer at this temperature for 2 to 48 hours.
In this treating method, at the surface as well as the interior of the wafer rapidly heated under the aforementioned temperature condition, the concentration of interstitial silicon atoms temporarily becomes lower than a thermal equilibrium concentration, leading to a depleted condition of interstitial silicon atoms to thereby provide an environment where oxygen precipitation nuclei tend to stably grow. Simultaneously, generation of interstitial silicon atoms are caused at the wafer surface so as to fill the depleted interstitial silicon atoms into a stable condition, so that the generated interstitial silicon atoms start to diffuse into the interior of the wafer. The area near the wafer surface which has been in the depleted condition of interstitial silicon atoms immediately falls into a saturated condition so that oxygen precipitation nuclei start to disappear. However, it will take some period of time for interstitial silicon atoms grown in the wafer surface to diffuse into the wafer interior. Thus, the deeper the distance from the wafer surface into the wafer interior, the longer the period of time over which an environment for easy growth of oxygen precipitation nuclei is maintained. Therefore, the closer to the wafer surface, the lower the density of oxygen precipitation nuclei. Further, the longer the heat treatment time (0.5 to 20 minutes), the greater the thickness of a denuded zone (hereinafter referred to as a xe2x80x9cDZxe2x80x9d) in which oxygen precipitation nuclei, i.e., defects are not formed. Moreover, the higher the temperature in the range of 800 to 1,000xc2x0 C., the larger the diffusion coefficient of interstitial silicon atoms, so that the thickness of the DZ becomes large in a short time.
Rapidly heating, leaving at a room temperature and then heating again the wafer up to temperatures of 800 to 1,100xc2x0 C. results in that those oxygen precipitation nuclei within the wafer, which have survived with the rapid heating, grow into oxygen precipitation and become stable IG sources. In the following description, the oxygen precipitation will be referred to as xe2x80x9cbulk micro defect(BMD)xe2x80x9d.
However, the aforementioned heat treatment method requires, as a pre-treatment for generating IG sources, introducing oxygen precipitation nuclei into a silicon wafer just ground and polished by holding the wafer at 500 to 800xc2x0 C. for 0.5 to 20 hours, and heat treating after rapid heating so as to render oxygen precipitation nuclei within the wafer to grow into BMD. This causes a problem of unnecessarily many times of heat treatment in the state of wafer.
The present invention is implemented to solve the foregoing problems. It is therefore a first object of the present invention is to provide a method of heat-treating a silicon wafer in the type of OSF free and COP free by avoiding the generation of OSF to be caused by the heat-treatment in spite of using a silicon wafer that is characterized in that OSF""s manifests itself at the center of the wafer by the conventional OSF-manifesting heat treatment.
A second object of the present invention is to provide a silicon wafer with a polysilicon layer and a method of fabricating such a silicon wafer, where the silicon wafer exerts a uniform gettering effect between the peripheral edge and center of the silicon wafer as a result of a uniform oxygen precipitation occurred at the entire surface of the silicon wafer.
A third object of the present invention is to provide a method of heat-treating a silicon wafer, where a silicon wafer sliced from an ingot consisting of a mixed domain of [PV] and [PI] and having an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM) not only has no agglomerates of point defects, but also generates oxygen precipitation nuclei higher than a desired density by the heat treatment in the device manufacturing process to exert the IG effect.
A fourth object of the present invention is to provide a method of heat-treating a silicon wafer, where an oxygen donor killer treatment is not required.
A fifth object of the present invention is to provide a method of heat-treating a silicon wafer that exerts a high IG effect by subjecting the wafer to a heat treatment at a temperature of 950xc2x0 C. or less and allows a reduction in the number of heat treatments on the silicon wafer.
A sixth object of the present invention is to provide a silicon wafer fabricated by the above novel method and exerting a high IG effect.
A seventh object of the present invention is to provide a silicon monocrystal ingot to produce the above silicon wafer capable of exerting a high IG effect.
In the first aspect of the present invention, a method of heat-treating a silicon wafer comprises the steps of: preparing a silicon wafer having an oxygen concentration of 1.2xc3x971018 atoms/cm3 or less (old ASTM) without generating COP""s and L/D; forming a polysilicon layer of 0.1 xcexcm to 1.6 xcexcm in thickness on a back of the silicon wafer by a chemical-vapor deposition at a temperature of 670xc2x0 C.xc2x130xc2x0 C.; and heat-treating the silicon wafer having the polysilicon layer in an oxygen atmosphere at 1000xc2x0 C.xc2x130xc2x0 C. for 2 to 5 hours and subsequently at 1130xc2x0 C.xc2x130xc2x0 C. for 1 to 16 hours, wherein the silicon wafer before the formation of the polysilicon layer thereon is the type of a wafer in which OSF""s manifest itself at a center of the wafer when the wafer is subjected to the heat-treatment.
In the second aspect of the present invention, a silicon wafer having a polysilicon layer comprises: a silicon wafer having an oxygen concentration of 1.2xc3x971018 atoms/cm3 or less (old ASTM) without generating COP""s and L/D, and a polysilicon layer of 0.1 to 1.6 xcexcm in thickness formed on a back of the wafer, wherein the silicon wafer before the formation of the polysilicon layer thereon is the type of a wafer in which OSF""s manifest itself at a center of the wafer when the wafer is heat-treated in an oxygen atmosphere at 1000xc2x0 C.xc2x130xc2x0 C. for 2 to 5 hours and subsequently at 1130xc2x0 C.xc2x130xc2x0 C. for 1 to 16 hours.
The silicon wafers according to the first and second aspects are the type of a wafer prepared by the CZ method so as to appear OSF""s at the center of the wafer, and having comparatively many precipitation nuclei of oxygen at the center but hardly having precipitation nuclei of oxygen at the rest which is COP free. When forming a polysilicon layer on a back of the silicon wafer by the CVD method, BMD is formed at the entire surface of the wafer during the process of CVD. As a result of a uniform oxygen precipitation occurred at the entire surface of the wafer, the wafer obtains a uniform IG between the center and the rest thereof.
In the third aspect of the present invention, a method of heat-treating a silicon wafer sliced out from an ingot consisting of a perfect domain [P], comprises the steps of: pulling up a silicon monocrystal ingot consisting of a mixed domain of [PV] and [PI] and having an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM) from a silicon melt; slicing the ingot into silicon wafers; and holding the sliced silicon wafer in a gaseous atmosphere selected from the group consisting of nitrogen, argon, hydrogen, oxygen, and mixtures thereof at a temperature of 600 to 850xc2x0 C. for 30 to 90 minutes, where [PI] is a domain neighboring with a domain [I], is classified into the perfect domain [P], and has a concentration of interstitial silicons lower than the lowest concentration of interstitial silicons capable of forming interstitial dislocations, and where [PV] is a domain neighboring with a domain [V], is classified into the perfect domain [P], and has a concentration of vacancies equal to or lower than a concentration of vacancies capable of forming COP""s or FPD""s, where the domain [I] is a domain dominated by interstitial silicon point defects and including agglomerates of interstitial silicon point defects within an ingot, the domain [V] is a domain dominated by vacancy point defects and including agglomerates of vacancy point defects within the ingot, and the perfect domain [P] is a domain including no agglomerates of vacancy point defects and no agglomerates of interstitial silicon point defects.
In the fourth aspect of the present invention, a method of heat-treating a silicon wafer sliced out from an ingot consisting of the above perfect domain [P], comprises the steps of: pulling up a silicon monocrystal ingot consisting of the above mixed domain of [PV] and [PI] and having an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM) from a silicon melt; slicing the ingot into silicon wafers; and holding the sliced silicon wafer in a gaseous atmosphere selected from the group consisting of nitrogen, argon, hydrogen, oxygen, and mixtures thereof at a temperature of 600 to 850xc2x0 C. for 120 to 250 minutes.
In the fifth aspect of the present invention, a method of heat-treating a silicon wafer sliced out from an ingot consisting of the above perfect domain [P], comprises the steps of: pulling up a silicon monocrystal ingot consisting of the above mixed domain of [PV] and [PI] and having an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM) from a silicon melt; slicing the ingot into silicon wafers; heating the sliced silicon wafer in a gaseous atmosphere selected from the group consisting of nitrogen, argon, hydrogen, oxygen, and mixtures thereof at rising temperatures from room temperature to a predetermined temperature of 1150xc2x0 C. to 1200xc2x0 C. at a rate of 10 to 150xc2x0 C./second; and holding the heated silicon wafer at the predetermined temperature of 1150xc2x0 C. to 1200xc2x0 C. for 0 to 30 seconds.
In the third to fifth aspects of the present invention, the ingot has an oxygen concentration of 0.8xc3x971018 to 1.4xc3x971018 atoms/cm3 (old ASTM) and consists of the mixed domain of [PV] and [PI]. When a silicon wafer sliced out from the above ingot is heat-treated in the above condition, not only a density of precipitation nuclei of oxygen enhances at the domain [PV] in which precipitation nuclei of oxygen introduce during crystal growth but also precipitation nuclei of oxygen emerge at the domain [PI] in which precipitation nuclei of oxygen do not introduce during crystal growth. Accordingly, when the above heat-treated wafer is subjected to the heat treatment in the device manufacturing process of a semiconductor device maker, the above precipitation nuclei of oxygen grow up to BMD to thereby exert the IG effect at the entire surface of the wafer even if the wafer consists of the mixed domain of [PV] and [PI].
In the sixth aspect of the present invention, a method of heat-treating a silicon wafer comprises the steps of: pulling up a silicon monocrystal ingot from a silicon melt; forming a silicon wafer from the ingot; and rapidly heating the silicon wafer from a room temperature to a predetermined temperature of 650 to 950xc2x0 C. at a rate of 10xc2x0 C./minute or over and holding the silicon wafer for 0.5 to 30 minutes, wherein the silicon wafer generates OSF""s in an area wider than 25% of the entire area thereof and an oxygen precipitation of 1xc3x97105 to 3xc3x97107/cm3 without an occurrence of dislocation when the wafer is subjected to the heat-treatment.
The method in the sixth aspect of the present invention exerts a high IG effect by rapidly heating the polished wafer which is obtained the ingot under the above condition without conventional processes of pre-annealing to introduce precipitation nuclei of oxygen into the wafer and growing up precipitation nuclei of oxygen to BMD""s.
The above and other objects, effects, features and advantages of the present invention will become more apparent from the following description of embodiments thereof taken in conjunction with the accompanying drawings.